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STMicroelectronics introduces highly integrated power management chip for STM32 microprocessors


The STMicroelectronics STPMIC25 power management chip for the STM32MP2 microprocessor is now available. Equipped with 16 output channels in a convenient package, the new product can power all the MPU's power rails as well as system peripherals, requiring only a few external filtering and stabilization components to complete the hardware design. The evaluation board STEVAL-PMIC25V1 is available now and developers can start developing applications immediately.
The new power management chip consists of seven DC/DC buck converters and eight low dropout (LDO) regulators, with an additional LDO regulator providing the reference voltage (Vref) for the system DDR3 and DDR4 DRAMs. Among the eight LDO regulators is a dedicated 3.3V channel regulator to power USB Hi-Speed and Type-C PHY ICs, and general-purpose LDO regulators that can be assigned to power circuits such as memory card interfaces and Ethernet ports.
The buck converters are optimized to power the MPU's CPU, core circuitry, GPU, I/O, and analog power domains, and feature additional channels to power DDR RAM and a general-purpose auxiliary output. Designed for fast transient response and low ripple, the converters are suitable for a wide range of operating conditions to meet the specific needs of the MPU power domain. All converters feature adaptive constant on-time control for high power efficiency, spread-spectrum frequency modulation and phase-shift switching, and advanced synchronization techniques to minimize EMI interference. In addition, each converter has a high low-power operating mode that can be controlled by application software to change modes, allowing the host system to minimize converter quiescent current and improve energy efficiency. All buck converters and LDOs can be independently enabled and disabled.
The new power management chip consists of seven DC/DC buck converters and eight low dropout (LDO) regulators, with an additional LDO regulator providing the reference voltage (Vref) for the system DDR3 and DDR4 DRAMs. Among the eight LDO regulators is a dedicated 3.3V channel regulator to power USB Hi-Speed and Type-C PHY ICs, and general-purpose LDO regulators that can be assigned to power circuits such as memory card interfaces and Ethernet ports.
The buck converters are optimized to power the MPU's CPU, core circuitry, GPU, I/O, and analog power domains, and feature additional channels to power DDR RAM and a general-purpose auxiliary output. Designed for fast transient response and low ripple, the converters are suitable for a wide range of operating conditions to meet the specific needs of the MPU power domain. All converters feature adaptive constant on-time control for high power efficiency, spread-spectrum frequency modulation and phase-shift switching, and advanced synchronization techniques to minimize EMI interference. In addition, each converter has a high low-power operating mode that can be controlled by application software to change modes, allowing the host system to minimize converter quiescent current and improve energy efficiency. All buck converters and LDOs can be independently enabled and disabled.
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